1. Field
The present invention relates to a semiconductor memory having a memory cell and a word line connected to the memory cell.
2. Description of the Related Art
Recently, a semiconductor memory such as a DRAM, a pseudo SRAM, etc., is employed as a work memory to be mounted on portable equipment such as a mobile phone etc. Since a memory cell (dynamic memory cell) of the DRAM is small compared to a memory cell of the SRAM, the employment of the DRAM will reduce the manufacturing cost. On the other hand, the semiconductor memory having the dynamic memory cell sets a selection voltage of a word line to a voltage higher than a power supply voltage in order to increase the amount of charges of data to be held in the memory cell and to improve the read margin.
In a transistor the gate of which is provided with a high voltage, a gated induced drain leakage (GIDL) current tends to occur. Since the GIDL current flows between the drain and the substrate of the transistor depending on the gate voltage, the larger the gate voltage, the larger the GIDL current becomes. Because of this, in the semiconductor memory of this kind, the increase in the standby current due to the GIDL of the transistor that receives a high voltage at the gate is a serious problem in the word driver. In particular, in a pMOS transistor that receives a high voltage at the gate, the high voltage is supplied to the substrate (well) and therefore the voltage difference between the drain and the substrate becomes large and the GIDL current tends to become large. A technique has been proposed (for example, Japanese Unexamined Patent Application Publication No. 2005-158223), which lowers the level of the high voltage to be supplied to the gate of the transistor of the word driver during the standby period during which the memory cell is not accessed in order to reduce the GIDL current and the standby current.
In the above-described technique, the voltage line that supplies a high voltage is connected to all of the word decoders. Because of this, there used to be a problem in that charges of the voltage line are charged/discharged each time the levels of the high voltage are switched and the current consumption increases. In particular, in the self-refresh mode (standby mode) in which the refresh operation is repeated automatically inside the semiconductor memory, due to the charge/discharge current caused by the switching of the high voltage level, the standby current increases. In other words, there is a possibility that the amount of the charge/discharge current due to the circuit operation to reduce the GIDL current becomes larger than the amount of reduction in the GIDL current.